2022 Storage Developer Conference Speakers

Sudhir Balasubramanian

Sudhir Balasubramanian

Senior Staff Solution Architect & Global Oracle Lead, VMware

Biography

27 + years Oracle hands on experience  -  Principal Oracle DBA / Architect, Oracle RAC/Data Guard Expert, Experienced in  EMC SAN Technologies
Principal Oracle DBA/Oracle Architect (1995 – 2011) [ Tata Consultancy Services (TCS), Sony Electronics, Newgen Results (Aspen) ,Teletech Corp, SAIC, Active Network, Sempra Energy Holdings]
VMware [2012-] Senior Staff Solution Architect & Global Oracle Practice Lead
VMware VCA – Cloud ,VMware vBCA Specialist
VMware vExpert & vExpert Application Modernization - https://vexpert.vmware.com/directory/1038
Member of the Office of the Chief Technical Ambassador VMware (Alumni)
Oracle ACE - https://apex.oracle.com/pls/apex/f?p=19297:3
Leading Author of “Virtualizing Oracle Business Critical Databases on VMware SDDC”
Recognized Speaker@ Oracle Open World, IOUG, VMworld, VMware Partner Exchange, EMC World, EMC Oracle Summit and Webinars
Industry recognized expert in Oracle Virtualization technologies

Blogs
http://vracdba.com/ | https://community.oracle.com/blogs/sudhirb
https://blogs.vmware.com/apps/author/sudhirbalasubramanian/
Twitter : @vracdba [ https://twitter.com/vRacDba ]
LinkedIn : https://www.linkedin.com/in/sudhirbalasubramanian/


Stephen Bates

Stephen Bates

CTO, Eideticom

Biography

Stephen is an expert in performance storage, persistent and non-volatile memory, computer networking, signal processing and error correction coding and has worked on some of the most complicated communication and storage solutions in the industry. He has a PhD from Edinburgh University.


Rory Bolt

Rory Bolt

Principal Architect, Sr. Fellow, KIOXIA America, Inc.

Biography

Rory joined KIOXIA America in 2017. He has founded, built teams, and delivered product at four storage startups which were acquired ($400M, $165M and two undisclosed). Rory has more than twenty-five years of experience in data storage systems, data protection systems, and high performance computing with tenures as VP software Engineering at Samsung, Technical Director/CTO counsel at NetApp, CTO counsel at EMC, Vice President, Chief Storage Architect, and Distinguished Fellow at Quantum. Rory has been granted over 12 storage related patents and has several pending. Rory has a BS in Computer Engineering from UCSD.


Thomas Coughlin

Thomas Coughlin

President, Coughlin Associates

Biography

Tom Coughlin, President, Coughlin Associates is a widely respected digital storage analyst as well as business and technology consultant. He has over 40 years in the data storage industry with engineering and management positions at several companies as well as 20 years as a respected consultant.


Dr. Debendra Das Sharma

Dr. Debendra Das Sharma

Intel Senior Fellow, Chief Architect of I/O Technology and Standards, Intel UCIe - Universal Chiplet Interconnect Express

Biography

Dr. Debendra Das Sharma is an Intel Senior Fellow and Director of I/O Technology and Standards Group. He is an expert in I/O subsystem and interface architecture, delivering Intel-wide critical interconnect technologies in Peripheral Component Interconnect Express (PCIe), coherency, multichip package interconnect, SoC, and rack scale architecture. He has been a lead contributor to multiple generations of PCI Express since its inception, a board member and leader of the PHY Logical group in PCI-SIG, and is the Chair of UCIe.

Debendra joined Intel in 2001 from HP. He has a Ph.D. in Computer Engineering from the University of Massachusetts, Amherst and a Bachelor of Technology (Hons) degree in Computer Science and Engineering from the Indian Institute of Technology, Kharagpur. He holds 99 U.S. patents and currently lives in Saratoga, Calif. with his wife and two sons. He enjoys reading and participating in various outdoor and volunteer activities with his family.


Jim Handy

Jim Handy

General Director, Objective Analysis

Biography

Jim Handy of Objective Analysis is a 35-year semiconductor industry executive and a leading industry analyst. Following marketing and design positions at Intel, National Semiconductor, and Infineon he became known for his technical depth, accurate forecasts, industry presence, and numerous market reports, articles, white papers, and quotes. He posts blogs at www.TheMemoryGuy.com, and www.TheSSDguy.com.


Howard Johnson

Howard Johnson

Technology Architect, Broadcom BSN, Member, Fibre Channel Industry Association

Biography

Howard is actively involved in the Fibre Channel standards development as part of the INCITS/ANSI T11.3 organization representing Broadcom and is the technical liaison with many of Broadcom’s Fibre Channel industry partners. Utilizing these relationships, Howard orchestrated standardization of the Fabric Notifications architecture for the Fibre Channel industry and worked with ecosystem partners to develop solutions leveraging Fabric Notifications in the formation of autonomous SAN technology.

Howard began his career in 1984 developing configuration applications for 3270 Cluster Controllers for McDATA Corporation in Boulder, Colorado. In 1993, in partnership with IBM, Howard was part of the team that created the ESCON Director Models 3/4/5 as well as the FICON to ESCON Bridge. As technical leader, he directed the efforts of the technical teams that expanded IBM’s original storage-area networks (SAN) from ESCON to FICON.

In 2007, Howard joined Brocade, a Broadcom company, as a member of the Fabric Operating Systems Architecture group and is responsible for the technical strategy relating to Brocade’s mainframe infrastructure offerings. His industry experience lead to a featured interview in Enterprise Executive (2019, issue 6), where he discussed the future of the mainframe, FICON, and Fibre Channel.

Today, Howard is an active member of the Brocade SAN Networking division of Broadcom Limited and continues his technical leadership in enterprise networking solutions. With more than 38-years of professional experience in high-end processing environments, Howard remains an active advocate of Fibre Channel and enterprise solutions.


Terence Kelly

Terence Kelly

Biography

Terence Kelly studied computer science at Princeton and U. Michigan followed by twenty years in industrial research (HP Labs) and software engineering (AWS/Amazon). He currently teaches and evangelizes persistent memory programming and writes the popular "Drill Bits" column in ACM Queue magazine (queue.acm.org).@acm.org>


Frederick Knight

Frederick Knight

Principal Standards Technologist, NetApp

Biography

Frederick Knight is a Principal Standards Technologist at NetApp Inc. Fred has over 40 years of experience in the computer and storage industry. He currently represents NetApp in several National and International Storage Standards bodies and industry associations, including NVM Express, SCSI (T10), Fibre Channel (T11), ATA (T13), IETF (iSCSI), TCG, SNIA, and JEDEC. He has authored documents at each of those committees . He is also the editor for several INCITS standards and the Convenor for the ISO/IEC JTC-1/SC25/WG4 international committee (overseeing the international standardization of T10/T11/T13 documents). Fred has received several NetApp awards for excellence and innovation and is the holder of several patents. He also received the INCITS Technical Excellence Award for his contributions to both T10 and T11 and the INCITS Merit Award for his longstanding contributions to the international work of INCITS. He also developed the first native FCoE target device in the industry. At NetApp, he contributes to technology and product strategy and serves as a consulting engineer to product groups across the company. Prior to joining NetApp, Fred was a Consulting Engineer with Digital Equipment Corporation, Compaq, and HP where he worked on clustered operating system and I/O subsystem design.


Jason Lee

Jason Lee

Scientist, Los Alamos National Laboratory

Biography

TBD


Kim Malone

Kim Malone

Storage Software Architect, Intel Corporation

Biography

Kim is a storage software architect in Intel’s Office of the CTO, focused on pathfinding around computational storage and heterogeneous computation. She has over 20 years of experience architecting and developing distributed high-availability distributed systems for the storage, networking, cable, and telecommunications industries. Prior to Intel, Kim held principal engineer roles at both NetApp and SwiftStack. Kim co-authored the first technical proposal for adding computational storage to NVMe, and is co-chair of the NVMe Computational Storage Task Group.


Vishwanath Maram

Vishwanath Maram

Director of software engineering, Samsung Semiconductor Inc

Biography

Vishwanath Maram is a Director of Software and performance engineering in Memory Solutions Lab (MSL) at Samsung Semiconductor Inc, located at San Jose, CA. Since the time of joining Samsung in 2014, he has contributed and worked on several projects related to software architecture for storage systems. At present, he is leading a team who is responsible for ecosystem development of Computational Storage. Prior to joining Samsung, he has worked at PMC Sierra, Adaptec and EMC with an overall 20+ years of storage industry experience. He received Bachelor's degree in Computer Engineering from India, and completed the Engineering Leadership Professional Program (ELPP) at University of California, Berkeley.


William	Martin

Bill Martin

SSD IO Standards, Samsung Semiconductor, Inc.

Biography

Bill has been involved in the storage industry for over 35 years serving on industry consortiums and standards bodies for storage including SNIA, INCITS T10, INCITS T13, INCITS T11, SATA-IO, and NVMe. In addition to his role representing Samsung in SSD IO Standards, Bill currently holds the following industry leadership roles: co-chair of the SNIA Technical Council, Chair SNIA CMSI, Board member of the NVMe Board of Directors, Chair of INCITS T10, and Secretary of INCITS T13.

Bill is: editor of the SNIA Computational Storage Architecture Model; editor of the SNIA Computational Storage API; editor of the SNIA Key Value Storage API; editor of SCSI Block Commands – 5 (SBC-5); and author of numerous proposals to: NVMe, SNIA, INCITS T10, INCITS T13, and INCITS T11. He has received numerous industry recognitions for his contributions to the storage industry over the past decades including: SNIA Volunteer of the Year award 2021, INCITS Gene Milligan award for effective committee management 2016, INCITS Merit award 2013, FCIA Achievement award 2010, INCITS Outstanding Leadership Team award 2007, INCITS Technical Excellence award 2005, FCIA Lifetime Achievement award 2005, and SNIA Outstanding Theme lead for the interop lab 2004.


Jason Molgaard

Jason Molgaard

Sr Principal Storage Solutions Architect, Co-Chair CS TWG, SNIA Technical Council, ARM, SNIA

Biography

Jason is a flexible, experienced, lead ASIC/SoC Design Engineer, and Architect with proven architecture, design, verification, and design leadership experience in Fortune 500 and Global Technology companies. Extensive experience developing enterprise storage ASICs, including microprocessor and microcontroller design and integration. Effective ASIC and team lead who prioritizes and assigns tasks, tracks progress, and collaborates with local, remote, and international engineers. Skilled at communicating, explaining and instructing.

Jason is also the co-chair of the SNIA CS TWG and a member of the Technical Council


Peter Onufryk

Peter Onufryk

Intel Fellow / NVM Express Technical Workgroup Chair, NVM Express

Biography

Peter is an Intel Fellow in the Design Engineering Group at Intel. He has been active in NVMe standardization as an NVMe Board Member, NVMe Management Workgroup Chair, and NVMe Technical Workgroup Chair. Peter holds over 40 patents and has written several published articles and books. Before Intel, Peter was a Fellow in the Data Center Solutions business unit at Microchip responsible for storage product architecture. He was previously Director of Engineering at Integrated Device Technology (IDT) and a research staff member at AT&T Bell Labs. Peter earned a Ph.D. in Electrical and Computer Engineering from Rutgers University and an MSEE from Purdue University.


Thomas Rivera

Thomas Rivera

Strategic Success Manager/Co-Chair DPPC, VMware/SNIA DPPC

Biography

Thomas Rivera has over 25 years of experience in data storage architectures, with specialties in data protection and data privacy. Thomas is at VMware Carbon Black, working on advancing Cybersecurity & Data Privacy standards.

Thomas co-chairs the SNIA Data Protection and Privacy Committee (DPPC), and is an active member of SNIA’s Security Technical Working Group. Thomas also serves as the secretary for Cybersecurity & Privacy INCITS Technical Committee, as well as secretary for the Cybersecurity & Privacy Standards Committee within IEEE.

In addition, Thomas is the chair of the IEEE Zero Trust Security Working Group.


Brad Settlemyer

Brad Settlemyer

Principal Staff, NVIDIA

Biography

Brad Settlemyer is a principal researcher in NVIDIA Networking's Advanced Technology group. Before coming to NVIDIA he spent 7 years at Los Alamos National Laboratory where he lead the storage systems research efforts within the Ultrascale Research Center and his team was responsible for designing and deploying state of the art storage systems for enabling scientific discovery. Prior to Los Alamos he was a storage systems researcher at Oak Ridge National Laboratory. He received his Ph.D in computer engineering from Clemson University in 2009 with a research focus on the design of parallel file systems. His experience includes projects ranging from ephemeral file system design to archival storage systems using molecular information technology and he has published papers on emerging storage systems, long distance data movement, system modeling, and storage system algorithms. His work has been featured in national media, in 2019 his team won an R&D100 award for their work on DeltaFS, in 2020 their work on computational storage was recognized with a Government Innovation Award, and in 2021 he won an R&D100 award for ADS Codex a system for encoding digital data into DNA molecules.


Scott Shadley

Scott Shadley

VP Marketing, Co-Chair SNIA CS TWG, SNIA Executive BoD Member, NGD Systems, SNIA

Biography

Scott has spent over 25 years in the semiconductor and storage space in MFG, Design, and Marketing. His experience spans 17 years at Micron. He spent time at STEC, where he was critical to the growth of the startup to acquisition. His efforts have helped lead to products in the market with over $300M in revenue. With over $2B in overall program revenues over the last 10 years, Scott is now driving NGD Systems to a new forefront of success.