Bill Gervasi

Mr. Gervasi has over 40 years of experience in high speed memory subsystem definition, design, and product development. Career highlights include 19 years at Intel where he was systems hardware designer, software designer, and strategic accounts manager. Mr. Gervasi subsequently was with S3 where he was a graphics architecture specialist and at Transmeta as memory technology analyst. Most recently he held several key positions with companies such as Netlist, SimpleTech, and US Modular driving unique memory module configurations. He is now Principal Systems Architect for Nantero, developing non-volatile RAM-class memories. Mr. Gervasi been involved in the definition of Double Data Rate SDRAM since its earliest inception. He has served on the JEDEC Board of Directors and chaired committees for DRAM parametrics and small form factor memory modules during the development of DDR1 through DDR5. He is currently the chairman of the JEDEC Alternative Memory committee.